FAST's goal is to teach and research SDN, based on open source, develop a set of FPGA-based SDN switch implementation code, including FPGA hardware source code and related software source code running on the CPU in the switch.
Researchers, teachers, and students involved in SDN research and teaching can not only directly use these source code, but also generate operational SDN switches on the FAST-supported FPGA switching platform, and interconnect with general-purpose SDN controllers such as floodligjt, ODL, etc. Own SDN network; and can directly participate in the development of FAST switches, write and submit their own FPGA function modules or software programs, and expand the functions of existing FAST switches.
First, the code composition of FASTThe FAST project code has three main sources. First, during the period of 2011-2015, graduate students of the National Defense Science and Technology University of Computer Science participated in the course design of the NetMagic08 platform in the Experimental Course of Router Principles and Design. Second, since 2012, the National Defense Science and Technology University, Hong Kong Polytechnic University, Beijing University of Posts and Telecommunications, Southeast University The development of the Internet measurement, SDN exchange and software-defined experimental bed based on NetMagic08 and NetMagic Pro platform by the Institute of Computing Technology of the Chinese Academy of Sciences; the third is the design code of NetEXP based on NetMagic08 developed by Hunan Xinshi Network Technology Co., Ltd. .
These code from multiple FPGA switching projects include FPGA hardware design code (Verilog program), control software code running on the CPU of the switch, and other code (such as APP code written based on RESTAPI) that make up the relevant demo. The detailed composition is as follows: Shown.
Hardware code
Analysis code of IPv4/IPv6/LISP protocol packets;
Accurately match the lookup table algorithm implementation code;
A code matching table matching algorithm (Stride BV algorithm) is implemented to support the code;
Static/dynamic buffer management code;
a token bucket based flow control code;
Priority scheduling code;
Sub-component tablets and recombination code;
LISP tunnel implementation code;
Netmagic Access Control Protocol (NMAC) hardware implementation code;
Reliable Transfer Protocol (OpenVAS) hardware implementation code;
Software code
Openflow channel code on the switch side;
Flow table management code on the switch side;
Rule conversion code of BV algorithm;
Token bucket controller code;
Local configuration interface code;
Counter explicit code;
Virtual network interface code;
NMAC console code;
Reliable Transfer Protocol (OpenVAS) console code;
Typical switches and network devices implemented
Self-learning L2 switch
SDN switch supporting Openflow1.0
SDN switch supporting openflow1.3
IPv4 router
LISP XTR Router
Software Defined Tunnel Switch (for software-defined lab bed builds)
NetLabs platform supporting NETEXP network teaching case
Although the code is currently only available on the NetMagic08 and NetMagic Pro platforms, in practice most of the code is platform-independent. Therefore, the FAST software and hardware architecture clearly distinguishes the platform related code and platform-independent code, which facilitates the cross-platform porting of the software and hardware implementation code of the SDN switch.
Second, the FAST code tree structureThe code tree structure of the FAST project on github (https://github.com/FAST-Switch/fast) is as follows. In the top-level directory, it mainly contains three subdirectories lib, Project, docs and README and LICENSE provided according to github requirements. file.
The Lib directory contains all platform-related and platform-independent hardware and software code, and its classification is composed as shown in the comments following the directory of the code tree. All FPGA design code is divided into two categories: pipeline and platform. The pipeline is platform-independent code, corresponding to the implementation logic of the openflow forwarding pipeline, including the forwarding actions acTIon, buffer, keygen, match, parser, and other directories, respectively, into the corresponding amount code. For example, the Stride BV algorithm is implemented in the match directory, the IPv6 protocol analysis is placed in the Parser directory, and the token bucket implementation is placed in the acTIon. The platform related code includes network interface packet transceiving code, interface CRC check implementation code, FPGA and CPU communication code, FPGA access peripheral memory, controller code such as DDR, TCAM, and the like. In the NetMagic08 and Pro platforms, code outside the User Module (UM) is platform-dependent code.
The software subdirectory in the Lib directory contains the software code executed on the switch CPU, which is also divided into platform-independent code and platform-dependent code. Platform-independent code includes openflow control channel implementation code, table management code, algorithm-related code, data plane service extension (such as implemented stateful firewall) code, etc.; platform-related code includes NMAC protocol software running on NetMagic08 control terminal CPU, NetMagic Pro Self-contained PCIe driver software running on the CPU, multi-interface virtual driver software, etc. The platform-related software uses the same API interface for upper-layer applications, and abstracts and identifies software-accessible hardware resources using the idea of ​​virtual address space. Virtual address space is an important concept of FAST implementation and will be covered in detail in subsequent articles.
Project includes examples of various FPGA switches currently implemented, including L2 switches, software-defined tunnel switches (for software-defined lab bed construction), and various SDN switches. The Doc directory contains various documents related to the FAST code.
Figure 1 FAST code structure
It should be noted that in each instance directory of Project, the relevant source code is not included, but the engineering configuration file of the hardware FPGA (such as the .qsf file corresponding to the altera FPGA platform) and the makefile required for software compilation are included. . In these two files, all the hardware source files and software source files required for the implementation of this project are included in the relative path. Therefore, the user can index all the source files of the project through these two files, and directly compile and map the project configuration file through the FPGA development environment (such as Quartus II) to generate the FPGA configuration file, and obtain the software by compiling the makefile. Execute the image.
How to get and use the FAST code on github will be covered in detail in a subsequent article.
Third, the optimization and integration of FAST codeAt present, FAST has initially established a code tree structure on github, and various FPGA switch design codes and documents are being uploaded. After the uploading of these codes and documents, there is still a lot of code optimization and integration work to be done, mainly including two aspects.
On the one hand is the cleanup and test verification of the code. The current FAST code is mainly from graduate students, the quality level is different, and the style is varied. Therefore, it is necessary to delete or rewrite the code that does not meet the quality requirements. At the same time, re-test the function of the code and find that the bug is repaired and updated in time. After initial code cleanup and test verification, FAST can basically achieve an open source effect similar to the NetFPGA project, which implements the code repository function. Users can find the corresponding software and hardware design code by searching the corresponding project directory, run and test on their own FPGA platform, use github to submit bug reports, and promote the continuous improvement and update of source files.
On the other hand, unlike the NetFPGA project, FAST hopes to be platform-independent, so it is necessary to divide the software and hardware code into two parts that are platform-independent and platform-related, and a large number of duplicate platform-independent codes in different projects, such as The token bucket control code and the forwarding table lookup code need to be re-implemented by means of parameter transfer to reduce the number of copies of the same function module and simplify the pressure of subsequent version management.
It is hoped that through the above work, multiple sets of completely independent code in the current FAST project can be gradually developed into a full-featured, high-quality code, and at the same time attract more extensive researchers to join the development of FAST, so that FAST truly becomes support. SDN research and teaching platform.
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