introduction
With the widespread use of digital technology and computer technology, lighting control systems such as stage and studio have changed from traditional analog control to digital control. In order to solve the equipment compatibility problems of various manufacturers, the American Theater Technology Association (USITT) has developed the DMX512 protocol standard. Because the protocol is simple and practical, almost all lighting and stage equipment manufacturers currently support the control protocol, making it an international standard for lighting control. As the agreement stipulates that the DMX512 signal is transmitted through the EIA-485 wired cable, this makes it difficult to install the equipment in an environment that is not conducive to wired wiring. Therefore, it is necessary to design a short-distance wireless communication system to replace the wired cable to complete the signal transmission.
1 Introduction to DMX512 protocol
The DMX512 protocol is suitable for a point-to-multipoint master-slave lighting control system. The master controller sends control timing to the bus. Other slave lighting devices on the bus receive bus data, extract the data of their corresponding channels, and complete the reception of control signals.
The protocol stipulates that the transmission of control signal data packets takes place through asynchronous communication. A DMX512 data packet contains a start code and 512 data frames. The data frame contains 1 start bit (low level), 8 bit data and 2 stop bits (high level), no parity. The signal data transmission rate of DMX512 is 250kbps, the width of each bit of the data frame is 4μs, and it takes 44μs to send a frame. A data frame represents a control channel, so the protocol supports 512 control channels. General stage lighting equipment can accept multi-channel control at the same time. The greater the number of channels accepted, the greater the amount of control data received, and the stronger the performance of the light. For example, some stage laser lights can project different patterns, colors and even characters as needed. The transmission of DMX512 data packets must meet certain format and timing requirements. Mainly contains a low-level output start mark (Break) of at least 88μs, a start code frame, 512 data frames, and the last packet end mark (high level). Only when the controller and the receiver meet the timing requirements of the DMX512 data packet can the communication between the master and slave be completed normally. The specific signal timing is shown in Figure 1.
2 System hardware design
2.1 Block diagram of system design
The purpose of system design is to use wireless transmission instead of wired cable to solve the problem of difficult wired wiring. Therefore, the design must meet the conditions of light and easy placement to ensure seamless integration with the original line system. As shown in Figure 2, the hardware structure of the entire system is composed of a microcontroller unit (MCU), a radio frequency transceiver unit and a power management unit.
In terms of working mode, on the one hand, the MCU unit of the transmitter module receives the bus data of the DMX512 control terminal, analyzes and disassembles the bus data, and then sends the data through the radio frequency transmission unit after appropriate processing; on the other hand, the receiver module receives the wireless data The data is integrated and reorganized by the MCU unit, and the DMX512 control signal is restored at the receiving end bus. The advantage of this design is that it can combine wired and wireless transmission. Setting up a wireless receiving module at the receiving end can ensure the effective transmission of DMX512 control signals in this area, and there is no need to install a wireless receiving module for each device.
2.2 Microcontroller unit
The microcontroller of this system adopts STC series single chip STC12C5410. The MCU contains 12KB of Flash memory, 512 bytes of RAM, asynchronous serial port (UART) and internal PLL unit. The built-in SPI bus controller can easily communicate with the RF chip CC1100, while the internal ISP (online programmable) module allows users to download programs directly through the serial port, bringing convenient conditions for system software upgrades. Because the data baud rate of DMX512 is 250kbps, 16MHz crystal oscillator is selected as the clock source to generate the same frequency baud rate.
2.3 RF transceiver unit
CC1100 is a low-power single-chip RF transceiver chip, which has the advantages of long communication distance, low power consumption and flexible interface. The chip is mainly set to work in the industrial, scientific and medical bands of 315MHz, 433MHz, 868MHz and 915MHz; the data rate supports programmable control of 1.2 ～ 500kbps; provides output power of -30 ～ 10dBm; the maximum open-air transmission distance is greater than 200m The voltage is 1.8 ~ 3.6V; maximum support 64 bytes of receive and send FIFO. Designers can complete internal register configuration through the SPI interface, read and write internal control such as receive / transmit FIFO.
2.4 Interface circuit design
The design of the interface circuit mainly includes two parts: the communication between the DMX512 bus and the single-chip computer, and the single-chip computer controls the CC1100 radio frequency module to send and receive data. Since the DMX512 bus data frame format is basically compatible with the universal asynchronous serial port (UART) format, the communication between the system and the DMX512 bus utilizes a serial communication interface. However, the electrical interface standard of DMX512 signal is EIA-485, which is not compatible with the TTL level interface of the single chip microcomputer. To realize mutual communication, it is necessary to use a level conversion chip as a bridge circuit. In decomposing and restoring DMX512 bus data, MC3486 and MC3487 are used respectively. At the sending end of the system, the differential data of the DMX512 bus is converted to TTL level data through MC3486, and the data is received by the serial port of the microcontroller; in addition, the pin of the serial port is also connected to the P3.2 / INTO port of the microcontroller for identification The start mark (Break) of the DMX512 bus notifies the MCU in advance to prepare to receive bus data. At the receiving end of the system, the TTL level data of the serial port of the single chip microcomputer is converted into DMX512 differential data through the MC3487.
The internal register configuration of the CC1100 and the reading and writing of the FIFO unit are completed through the single-chip 4-wire SPI bus interface. MISO and MOSI are data sending and receiving ports, SCLK is the synchronous clock, and SS is used as the chip select signal of the device. The GD02 signal of CC1100 is used as the status signal of the internal FIFO, which is used to indicate that the MCU FIFO space is full. The schematic diagram of the interface of the transmitting and receiving module is shown in Figure 3. The structure of the transmitting module and the receiving module are basically the same, but the direction of the communication data flow is opposite.
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