The development of integrated circuits and computer systems is increasingly demanding low power consumption. This paper explores the development trend of low-power circuits and systems, analyzes the main causes of power consumption and the relationship with cost, and proposes several solutions to achieve low power.
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Integrated System Design
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Today's integrated circuits and computer systems are becoming more complex. To accommodate this change, designers need to consider power requirements in the main design parameter table. The standard for low power logic circuits is defined as the power consumption of each stage gate is less than 1.3 uW/MHz, and is defined as less than 5 mW in analog circuits. End users believe that low power systems should meet low power requirements.
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For the overall system design, the position of power consumption in design has become more and more important, which is an inevitable trend of the development of the electronics industry. The general trend in the development of the electronics industry is to provide smaller, lighter and more powerful end products. Wireless and portable requirements are also present in many product areas, and design tasks will become more difficult from a power point of view. The goal of battery-powered product performance is that a single or a group of rechargeable batteries can sustain the device for several days, such as the Walkman player or cell phone that is now widely used.
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In addition, new requirements for low power consumption are being written into the “green†computer specifications by environmental protection organizations. Desktop computers purchased by all government departments must meet the power requirements, that is, the power consumption of any computer that is in a sleep state should not exceed 30W. Barta, sales manager for mobile products at VLSI Technologies, points out that desktop computers have a tendency to evolve toward "dark green" computers. These machines will suspend all operations until they are woken up by the associated stimulus signal before entering normal operation mode, similar to the laptop's power save mode.
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ARPA (US Defense Advanced Research Projects Agency) is conducting in-depth research in the field of low-power electronics to develop a mainstream technology that will make the power consumption of next-generation electronic systems much lower than those of existing systems. They feel the need to combine advanced technologies in advanced materials, devices, circuit structures, power management, and other fields, which are especially important for mobile computing and communication systems because they involve a large amount of mixed-signal processing, wireless frequencies. Efficient power conversion and distribution system for subsystems and DC source circuits.
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As circuit densities increase every few years, it is more difficult to achieve higher power densities in smaller package sizes, and many designers have learned that higher and higher interconnect densities and Increasingly fine PCB layouts can cause a series of problems. Koc, vice president of ASIC Marketing at LSI Logic, said that for a 100MHz, 200k gate, the power consumption during normal operation may reach 30 to 40W. This large power has far exceeded the heat dissipation capability of the package. The heat density and package limitations caused by power consumption in the system pose a greater challenge to the designer because high temperature operation can bring reliability and functionality problems to the integrated circuit. Many reliability calculation failure models are functions of exponential index of thermal coefficient. These fault models related to temperature include working device failure and current density, metal interconnection failure.
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Low power application
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In battery-powered mode, some laptops can work for more than 6 hours. Due to the actual size and weight limitation of the portable computer, the addition of a fan or other cooler is not allowed, and the size and weight of the battery are also limited. Therefore, it is not feasible to increase the battery size and prolong the battery working time.
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Another example of a low-power system is a cellular phone that integrates microprocessors, analog circuits, digital circuits, and RF circuits for system control into a small package that can be "received" after the battery is charged once. In the "standby" mode, it works all day and can have one hour of talk time.
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In general, low-power systems must face additional performance limitations associated with low power consumption, which is now an important performance metric in system design. The development of semiconductor processes and circuit structures has brought tremendous advances in component performance, as well as power consumption issues. In many cases it is difficult to balance performance versus power consumption, but multiple solutions can be obtained with appropriate power control methods or innovative designs.
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Reducing the supply voltage has two side effects. First, the lower the operating voltage of the circuit, the slower the speed. If other factors remain the same, the current of the capacitor charge and discharge or the load drive current will be reduced. Second, lower voltages will result in lower output power or lower signal amplitude, which can cause noise and signal attenuation problems.
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Causes of power consumption
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The overall power consumption depends on many factors such as substrate technology, package density, external environment, product performance, and supply voltage. In practical applications, the higher the speed, the higher the power consumption.
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The power consumed on the resistor is expressed as I 2 R, which is typically generated by the load device and parasitic elements. This aspect of power consumption is more or less the same regardless of the technology used, especially in resistive load circuits such as analog circuits. When deep submicron technology is used, the wires (metal wires) and interlayer parasitic resistance in the circuit generate static impedance power consumption, which also consumes a certain amount of current in dynamic power consumption.
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The normal operating mode of an active device can be described by a transfer curve and some IV characteristics. As shown in Figure 1, the product of the operating point voltage and current is a function of power and is suitable for all active devices. This product is a static value that contains leakage current and bias current for passive and active devices.
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In a CMOS circuit, ideally, the IV transfer curve is a transient function that does not consume power when moving from one state to another when the IV transfer curve crosses the threshold. However, in practical applications, the transfer curve is not an ideal square, so there is a large (potential) switching current for each state transition. Theoretically, in the worst case of the state transition process, a switching device with zero internal resistance creates a direct short circuit between the power supply and ground.
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In CMOS circuits, the maximum power consumption comes from the charging and discharging of internal and external capacitors, and W/Hz is usually used to represent the power consumption of each gate. According to this, it is possible to calculate the power required for charging and discharging the capacitor of the gate or output load (including the circuit package and the PCB wire) of the subsequent stage. The peak current I=C(V/T), V is approximately equal to the power supply voltage of the CMOS circuit, T is the rising or falling edge time, and C is the post-load capacitance, so the peak current is usually large. The average switching power P = C (V) 2 F, at this time C refers to the load capacitance at the output, V is the supply voltage, and F is the switching frequency.
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System cost of power consumption
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The higher the system power, the higher the required supply voltage and the more expensive the cost. The resulting effects involve the power bus, on-board bypass capacitors, motherboard wiring, power line filters, and even power cables and fuses. Wait. In addition, larger power supplies require more space and may affect the overall package of the system.
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Battery size, weight, and cost depend on the system's overall power requirements and the amount of time required for each charge. In general, the larger the battery, the higher the cost. Backup batteries and chargers may be comparable in size and weight to the original equipment, thus seriously affecting the portability of the equipment.
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Power can be expressed in terms of "dollar/W". The lower the overall power requirements of the system, the less overhead it has on the power supply. At the same time, small power products take up less space and consume less power, which is beneficial to the overall power consumption of the system.
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Thermal management of small electronic systems requires many different functions, but it may not be easy to do. Because the system may not have enough space or power to place the cooling elements, some systems may not tolerate the noise and electronic noise caused by the cooling elements. The limitations of the package shape may also force all of the heat generating components to be concentrated in a small area, which may increase the heat dissipation problem, and the user may feel uncomfortable when a hot plastic case electronic device is placed on the lap. Open operation of the equipment for heat dissipation is also not permitted for line-operated systems, especially for systems sold in Europe.
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Other issues include the cost of the fan and other heat sink components, and the cost increases as needed to accelerate airflow; the heat sink and heat pipe help to dissipate heat from the heat source, but heat is still removed from the system.
Low-cost plastic packaging cannot accommodate the high power characteristics of highly integrated ICs, forcing them to use expensive packages with thermal management or other more complex cooling systems.
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Low power circuit implementation
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The IC industry is looking for ways to meet low-power system requirements. One way is to change the operating voltage of the digital device from 5V to 3.3V, changing the analog device's supply voltage from ±15V to a 5V single supply. These changes are attributed to advanced silicon technology and circuit architecture. Katz, vice president of marketing at Atmel, said that the future development trend of digital chip operating voltage will be 2.5V, 1.8V or even lower voltage, which are multiples of 0.9V (the lowest limit of battery voltage). The complexity of the device, the higher operating frequency, and the physical properties of the device will all contribute to this trend, as thinner oxide layers in submicron geometries will have a harder to withstand higher supply voltages.
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In order to meet the requirements of low power systems, ASIC manufacturers will also adopt a method of adding 3V core units and macros to the product. These products are optimized to operate at 3V or 5V power simultaneously and have the same performance specifications. With a special interface unit, they still have a 5V power interface. According to Harrington of AT&T Bell Laboratories, the biggest obstacle to the rapid replacement of supply voltages is that a large number of existing systems use 5V power supplies, which require products to retain backward compatibility with other 5V (TTL) interfaces.
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In addition, in the system design, the speed is roughly evaluated, and the selection of components can be appropriately changed if possible, and the power can be reduced.
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The following options are available:
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1. Reduce the operating voltage. When the voltage is reduced from 5V to 3V, the power consumption will be reduced by 60%.
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2. Use smart power. Add appropriate intelligent predictions, detections, and power to the system only when needed. Many laptops and their power management have this special mechanism that only powers the circuit that needs to work and reduces the clock rate when it is not needed.
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3. Use a lower clock rate. Since the power in a CMOS circuit is a function of the switching frequency, the power consumption of the device is also small at lower clock rates.
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4. Limit the input signal. In analog circuits (including A/D converters), limiting the bandwidth of the input signal helps to reduce the need for high-speed circuits and, if possible, reduces the speed of the A/D converter.
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5. Set the I/O so that it only consumes power when it is working. However, the transition from the inactive state to the working state takes a long time. Another side effect is that it may generate additional leakage current associated with the output circuit, reducing the output voltage to half of the power supply and causing other output circuits to be at high leakage. Cross work area.
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6. Expand the output range. For many ASICs, the design output circuit is only used to drive a standard IC. By re-adjusting the circuit enough to drive the parasitic components on the package and board, and leaving a safety margin for the fan load, this reduces the output circuit size and power.
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7. Switch to other technologies. BiCMOS circuits combine the advantages of CMOS devices and bipolar devices, making them the best compromise for higher process complexity and higher cost. GaAs devices can also meet the requirements of lower power consumption and higher speed, and are suitable for high-priced systems where speed is the main design goal.
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Semiconductor manufacturers are developing new design techniques to meet specific power requirements while still ensuring circuit performance specifications. Pivot, an application engineer at Motorola Semiconductor, said the ultimate goal is that the circuit's operating voltage is less than 1V, and the final limit will depend on the device's process level that determines the minimum size of the device. Low-power circuits are still the object of research and research, and improving performance while reducing power consumption will be the goal they strive to achieve.
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System designers must have the ability to achieve higher circuit performance with limited power specifications, as well as basic system performance metrics, cost targets, and time-to-market requirements. However, designers still need to carefully analyze the power of all components in the system. New tools and new technologies for optimizing power design help improve the design environment and make the designer's job easier.
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