Bottlenecks and Challenges in Smart Interconnected Data Flooding

The endless number of smart applications continue to challenge the limits of people's imagination. Reports that are overwhelming all the time indicate that the smart world has come. Yes, the smart world is coming, followed by a torrent of data from the Pentium:

By 2020,

Average per Internet user: 1.5GB/day

Self-driving car: 4TB data/day

Connected aircraft: 5TB data/day

Smart Factory: 1PB data/day

Cloud video provider: 750PB video/day

......

"By 2020, 50 billion terminals will be connected to the network, far exceeding the current 8 billion, and IP traffic will also reach 2300 EP/year," said Rina Raman, vice president of Intel's Programmable Solutions Division and general manager of the Customer Experience Division. It is emphasized that the cycle formed by the interconnection of data centers and terminals will gradually accelerate with the development of the Internet of Things, so the network must process more data at a higher speed, and the data center needs to do more complicated calculations. To deal with larger data sets, even embedded terminals need to do a lot of local calculations. In addition, data centers need to deal with some of the more challenging workloads: big data analytics, machine learning, and so on. As a result, bottlenecks and challenges emerged in the cycle.

Bottlenecks and Challenges in Data Flooding

The aforementioned challenges and bottlenecks are in 5G wireless communications, radar and aerospace, networks, cloud computing, smart cities, and autonomous driving.

5G network: The future needs more bandwidth and more complex digital signal processing capabilities. Intel FPGAs can help meet these challenges. Especially in 5G network applications, FPGAs can speed up the computing and baseband signal processing capabilities of MIMO antennas, address security and other network functions that may constrain development.

Radar and Aerospace: In radar applications, safety-related communications are facing a series of challenges: they include algorithms for wave speed shaping, FFT and filter, and machine learning. The past solution is: through a faster CPU or faster DSP chip array or ASIC to deal with, but by using FPGA, designers can accelerate data processing, accelerate the processing of machine learning tasks, make the entire architecture easier, and the development environment Also more unified.

Network: With the acceleration of the virtuous circle of data centers and terminals and the continuous development of the Internet of Things, the network needs to undergo a fundamental transformation, including local networks, metropolitan area networks, backbone networks, and even data centers. The key to the transformation is: Virtualization of network functions, that is to say, some key functions (such as exchange, security, detection and reporting, etc.) are transferred from dedicated hardware to data center hardware and software. It is in such an environment full of uncertainties and rapid changes that FPGAs can accelerate the exchange, detection, and processing of security tasks for critical packets.

Driverless: There is bound to be more demand for computational performance. The uncertainty of the algorithm may also generate silos of computation. Each island may have its own hardware and development environment, which is not available to manufacturers. continuous. FPGAs can play a key role in the computational applications of local computing and deep learning. At the same time, it is also possible to connect automobiles, other vehicles and highway infrastructure and clouds through 5G connections.

Smart cities: There are many isolated islands of computing in modern cities, including traffic management systems, lighting management systems, parking management systems, and security cameras. These many different systems are produced by many different manufacturers, each of which There are different architectures, different development environments, and there is no way to achieve data sharing with each other. Intel CPUs and FPGAs can replace these proprietary architectures and provide native computing, connectivity, and analysis capabilities.

Cloud computing: In the cloud environment, the workload and its composition will change dynamically. Even the performance required by some workloads is difficult to achieve even if the CPU is under a reasonable power consumption level, so some special chips are needed. Or it is equipped with a GPU, which deals exclusively with parallel operations and can be equipped with a network accelerator to handle protocol and secure traffic offloading. It can also be equipped with a video decoder or an ASIC-specific integrated circuit for search acceleration and deep learning. However, there is often no space on the server, and there is not enough power to support all chips. So, some cloud service providers and data center architects are turning to Intel FPGAs, FPGAs, and Xeon CPU connections to provide hardware acceleration for search, compute, encryption, packet processing, and machine learning. Once changed, designers can reconfigure the FPGA to meet newer requirements.

FPGA: Critical to heterogeneous architecture

Deal with the growth of large amounts of data!

Deal with the changes in the computing environment brought about by rapidly changing new technologies!

CPU's own power consumption!

Relying on the homogenous expansion of computing platforms, it is far from meeting the above-mentioned challenge requirements, and different heterogeneous architecture combinations have become inevitable. Today's hardware platforms include: CPUs, FPGAs, and dedicated accelerators, where the CPU is still the core engine of processing power. Together with dedicated accelerators (ASSPs, ASICs, etc.), the best computational efficiency can already be achieved. At the same time, FPGAs are playing an increasingly important role in it. It is like an advanced multi-functional accelerator that not only brings the greatest programming flexibility, supports highly differentiated products, but also can be on-site. Reconfigure to virtually accelerate any number of algorithms. FPGAs also support parallel operations, with performance ranging from throughput, real-time speed to energy consumption, which is 10 times better than CPU or GPU. In addition, FPGAs can handle larger data with lower latency, faster than software-based products that traditionally run on hardware products. It is also because FPGAs have both hardware and software-programmable capabilities that have become increasingly important in heterogeneous computing environments.

As shown in the figure below, Bypass Acceleration can transfer some heavily calculated data functions to the FPGA, freeing up the processor to handle other operations. If the delay is more important, it can also be built-in acceleration. In this way, the versatility of the FPGA can lead to better network storage and calculation acceleration.

Rina uses FPGAs to improve data center efficiency as an example to show how FPGAs can meet real challenges in life.

The first thing to face is: Database acceleration. The SWARM64 Scalable Data Accelerator uses Intel's latest FPGAs to process large amounts of parallel data, achieving very good throughput, power consumption, and higher performance. It can support any configuration, whether in the cloud or in the field. It can be seen that its real-time data analysis capability is five times that of the previous, data warehousing capacity is twice that of the previous, and storage compression capacity is three times that of the previous one.

The next problem to be solved is: gene sequencing. It is well-known that the amount of data for gene sequencing is large and complex. If the analysis ability cannot keep up, many research projects will be forced to postpone and thus affect the research progress of the entire medical community. Intel and BroadInstitute have jointly developed a software toolkit for genetic analysis, GATK, to analyze data for large-throughput sequencing. It is reported that researchers can now obtain 5 times the amount of data in the past one-third of the time, which is equivalent to a 15-fold increase. The BroadInstitute's Pair-HMM algorithm has been improved 50 times and the total traffic flow has increased by 1.2 times.

Another practical problem is: Storage NVMEOVERFABRIC. Attala hopes to use Intel FPGA to redesign and develop a new generation of storage and network infrastructure. The data is processed and accelerated in the hardware through the FPGA, and then enters the network infrastructure. Compared to the previous solution, the FPGA solution reduces the read/write speed delay by 57-72%. Therefore, Attala's solution not only has a strong adaptability to the combination of hardware and software solutions, but also reduces operating costs for cloud service providers.

In order to better support the application of smart connected world, Intel provides a series of FPGA products, including Stratix10, Arria10, Cyclone10 and Max10. Focusing on the future, Rina revealed Intel’s next-generation FPGA product, called Falcon Mesa in English. This is a product that uses Intel's 10-nm process technology, FinFET-based process, and Intel's second-generation HyperFlex architecture, or the second-generation heterogeneous SIP based EMIB (Intel Interface Specification). It is reported that Falcon Mesa is also the product of Altera's first-generation Intel 10nm process technology. In addition, Intel also provides an acceleration stack to help developers easily get started.

The challenges of the smart connected world are becoming more and more complex. Intel FPGAs are willing to participate in them, helping to speed up calculations and better respond to today's and future data needs.