[Source: "High-tech LED" magazine March issue (total issue 63) | Yimeixinguang Executive Vice President / CTO Liu Guoxu] How to develop ceramic high-power package in the middle power and COB double-sided pinch? This is a topic that high-power LED suppliers such as Lumileds, Cree, and OSRAM have been actively exploring in the past few years.
In addition to re-layout in the middle power (OEM-based), these LED packaging giants are trying to catch up with the mid-power leaders in Korea and Taiwan. At the same time, efforts have been made to improve the original ceramic packaging technology. With its advanced high-power flip chip or vertical structure chip, the package is gradually miniaturized to reduce the cost pressure caused by expensive ceramic substrates and low production efficiency.
For example, Cree's X-lamp series has been reduced from the original 3535 to 2525 and further reduced to 1616 without reducing or even increasing the luminous flux, approaching the size of the chip itself, becoming the Near Chip Scale Package or NCSP. The next step will naturally be the real CSP, which is to make the entire package almost the same size as the chip.
CSP is defined by the definition of CSP package by IPC standard J-STD-012, the package area is not more than 20% of the chip area. When the size of the ceramic substrate is so small, it gradually loses the function of helping the heat dissipation (heat dispersion and absorption) of the LED, and at the same time, with the appearance of flip chip, the redistribution of the PN electrode line by the ceramic substrate as an insulating material (re -distribution) The role no longer exists.
In addition to the protection of the LED in the difference in mechanical structure and thermal expansion coefficient, the main function of the substrate in electricity and heat has been basically lost.
In addition, since the substrate is still used, the solid crystal needs to use high-temperature solder to ensure that the patch does not melt twice. AuSn eutectic soldering is the main choice, but the cost is also high.
Therefore, this makes substrate-free packaging the next target. With the help of flip chip, the gold wire is removed, and the substrate is removed, which greatly reduces the cost of packaging BOM. At the same time, the L1 solid crystal process is reduced, and the packaging cost is reduced. In addition, due to the lack of a first-level package interface, the chip-to-PCB line The thermal resistance between the solder joints is lower.
In addition to re-layout in the middle power (OEM-based), these LED packaging giants are trying to catch up with the mid-power leaders in Korea and Taiwan. At the same time, efforts have been made to improve the original ceramic packaging technology. With its advanced high-power flip chip or vertical structure chip, the package is gradually miniaturized to reduce the cost pressure caused by expensive ceramic substrates and low production efficiency.
For example, Cree's X-lamp series has been reduced from the original 3535 to 2525 and further reduced to 1616 without reducing or even increasing the luminous flux, approaching the size of the chip itself, becoming the Near Chip Scale Package or NCSP. The next step will naturally be the real CSP, which is to make the entire package almost the same size as the chip.
CSP is defined by the definition of CSP package by IPC standard J-STD-012, the package area is not more than 20% of the chip area. When the size of the ceramic substrate is so small, it gradually loses the function of helping the heat dissipation (heat dispersion and absorption) of the LED, and at the same time, with the appearance of flip chip, the redistribution of the PN electrode line by the ceramic substrate as an insulating material (re -distribution) The role no longer exists.
In addition to the protection of the LED in the difference in mechanical structure and thermal expansion coefficient, the main function of the substrate in electricity and heat has been basically lost.
In addition, since the substrate is still used, the solid crystal needs to use high-temperature solder to ensure that the patch does not melt twice. AuSn eutectic soldering is the main choice, but the cost is also high.
Therefore, this makes substrate-free packaging the next target. With the help of flip chip, the gold wire is removed, and the substrate is removed, which greatly reduces the cost of packaging BOM. At the same time, the L1 solid crystal process is reduced, and the packaging cost is reduced. In addition, due to the lack of a first-level package interface, the chip-to-PCB line The thermal resistance between the solder joints is lower.
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