In recent years, with the rapid development of DSP and embedded technology, video devices using DSP embedded systems have been widely used in various fields. In this paper, ADSP Blackfin533 (BF533) is used as the core processor, and a video detection system is designed to realize video image acquisition, processing and network transmission. The system has the advantages of small size, low power consumption, high performance and portability.
1 system hardware platform design
System working principle: The image signal collected by the image sensor is output in YUV (4:2:2) format, and stored in SDRAM by DMA method through the PPI interface of BF533. After collecting one frame of data, BF533 reads the data from the SDRAM to convert the bitmap data format, and transmits the bitmap image data to the remote PC through the Ethernet interface, and then the system continues to acquire the next frame image.
1.1 processor
The Blackfin processor is the first fourth-generation DSP product developed by Analog Devices and Intel in April 2003 to deliver a high-performance architecture for embedded audio, video and communications. ADSP-BF533 is currently the highest performance of the Blackfin series of digital signal processors, with 600MHz main frequency, dual 16-bit MAC (multiplier) and two 40-bit ALU (arithmetic logic unit), four 8-bit video processing unit, eight arithmetic registers, 10 address addressing units, and a large number of peripherals and memory interfaces, operating at speeds up to 1200 MMAC per second (mega multiply-add), and ADSP-BF533 With a performance level of 600MHz, the power consumption is only 280mW, and the energy consumption is small. The advantages in image processing are more prominent, and two-dimensional DMA can be used to transmit data for image characteristics, which greatly speeds up and facilitates the transmission and processing of image data. ADSP-BF533 series DSP has rich interface, excellent performance, more video processing interface and independent video instructions, especially suitable for all kinds of audio and video, network equipment field, fully meet the requirements of system technical indicators, and has obtained a wide range in practice. Applications.
1.2 Image sensor
Omnivision's color image sensor OV7660 has 300,000 pixels, and the chip's pixel array reaches 1300x1280. It features high-sensitivity lighting, low-power power supply, low power consumption and small size. It is used in camera phones and network video. widely. Advanced sensor technology can also produce clear, complete, and stable color images by reducing or eliminating common optical/electrical resources (such as fixed pattern noise (FPN), smear effects, flash, etc.) in the image. For this system, it is a good choice.
0V7660 image sensor, built-in automatic exposure control (AEC), automatic gain control (AGC), automatic white balance (AWB) and other functions, support SXGA, VGA, QVGA, QQVGA, CIF, QCIF and QQCIF, can output RGB, YUV and YCbCr A variety of video data formats. The 0V7660 is connected to the PPI interface of the core processing chip BF533 through a dedicated Camera InteRFace interface. The interface circuit is shown in Figure 1.
In order to make the chip work normally, the internal register of the OV7660 needs to be configured through the serial video control bus (SCCB) bus, so that the chip outputs the correct color image data.
1. 3 system hardware structure
In order to complete the function of the system, in addition to the processor and image acquisition module, through the rich interface of B1ackfin533, the following modules are used in the development process.
(1) SDRAM module provides space for kernel operation, program operation and data cache for the system;
(2) The FLASH module provides storage space for the system;
(3) System debugging, porting, cross-compilation, UART interface and JTAG debugging interface are required;
(4) The network transmission of image data requires an Ethernet interface.
Of course, the system should also have power modules, system reset circuits, clock modules, etc. The system hardware structure is shown in Figure 2.
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